منابع مشابه
Deep Submicron VLSI Floorplanning Algorithm
In deep submicron VLSI designs, cross capacitance between adjacent wires becomes the dominant factor in determining chip performance and power consumption. Consequently, traditional floorplanning algorithms, which typically optimize for die area and ignore wire congestion, become inadequate in deep submicron era. Based on a stochastic congestion model, we propose a floorplanning algorithm that ...
متن کاملA linear programming-based algorithm for floorplanning in VLSI design
In this paper, we consider a floorplanning problem in the physical design of very large scale integration. We focus on the problem of placing a set of blocks (modules) on a chip with the objective of minimizing area of the chip as well as total wire length. The blocks have different areas and their shapes are either fixed (predetermined) or flexible (to be determined). We use the sequence-pair ...
متن کاملa novel differential evolution based optimization algorithm for non-sliceable vlsi floorplanning
floorplanning is an important step in physical design of vlsi circuits. it is used to plan the positions of a set of circuit modules on a chip in order to optimize the circuit performance. however, modern floorplanning takes better care of providing extra options to place dedicated modules in the hierarchical designs to align circuit blocks one by one within certain bounding box for helping seq...
متن کاملA Heuristic Approach for VLSI Floorplanning
Floorplanning is an essential step in VLSI chip design automation. The main objective of the floorplanning is to find a floorplan such that the cost is minimized. This is achieved by minimizing the chip area and interconnection cost. It determines the performance, size, yield and reliability of VLSI chips. We propose a Memetic Algorithm (MA) for non-slicing and hard module VLSI floorplanning pr...
متن کاملTrapezoidal Algorithm with Weighted Aggregation Scheme for floorplanning in VLSI
An important step in the automation of electronic design is the assignment of the physical components on the target semiconductor die. The major aim of floorplanning is to distribute the modules of a circuit onto a chip to optimize its area, wire length and timing. As the density of very large scale integrated (VLSI) circuits enhance, the need for faster floorplanning algorithms also grows. The...
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ژورنال
عنوان ژورنال: IEEE Transactions on Systems, Man and Cybernetics, Part B (Cybernetics)
سال: 2007
ISSN: 1083-4419
DOI: 10.1109/tsmcb.2006.883268